vhdl 디지털시계(stop_watch,시계.도트매트릭스,lcd)소스 완벽~

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vhdl 디지털시계(stop_watch,시계.도트매트릭스,lcd)소스 완벽~에 대한 보고서 자료입니다.

본문내용

entity div1 is
port(
clk: in std_logic;
in_data: in integer range 0 to 999;
o_data: out std_logic_vector(15 downto 0);
--o_data_100: out std_logic_vector(3 downto 0);
--o_data_10: out std_logic_vector(3 downto 0);
--o_data_1: out std_logic_vector(3 downto 0);
o_cmplt: out std_logic
);
end div1;
architecture arc of div1 is
signal mode: integer range 0 to 3;
signal a, b, c : std_logic_vector(3 downto 0);
signal c_1 : integer range 0 to 9;
begin
process(clk)
variable buf_data: integer range 0 to 999;
variable cnt: integer range 0 to 3;
begin
if clk\'event and clk = \'1\' then
if mode = 0 then
buf_data := in_data;
mode <= 1;
elsif mode = 1 then
if buf_data >= 900 then
buf_data := buf_data - 900;
a <= \"1001\";
mode <= 2;
elsif buf_data >= 800 then
buf_data := buf_data - 800;
a <= \"1000\";
mode <= 2;
elsif buf_data >= 700 then
buf_data := buf_data - 700;
a <= \"0111\";
mode <= 2;
elsif buf_data >= 600 then
buf_data := buf_data - 600;
a <= \"0110\";
mode <= 2;
elsif buf_data >= 500 then
buf_data := buf_data - 500;
a <= \"0101\";
mode <= 2;
elsif buf_data >= 400 then
buf_data := buf_data - 400;
a <= \"0100\";
mode <= 2;
elsif buf_data >= 300 then
buf_data := buf_data - 300;
a <= \"0011\";
mode <= 2;
elsif buf_data >= 200 then
buf_data := buf_data - 200;
a <= \"0010\";
mode <= 2;
elsif buf_data >= 100 then
buf_data := buf_data - 100;
a <= \"0001\";
mode <= 2;
else
a <= \"0000\";
mode <= 2;
end if;
elsif mode = 2 then
if buf_data >= 90 then
buf_data := buf_data - 90;
b <= \"1001\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 80 then
buf_data := buf_data - 80;
b <= \"1000\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 70 then
buf_data := buf_data - 70;
b <= \"0111\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 60 then
buf_data := buf_data - 60;
b <= \"0110\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 50 then
buf_data := buf_data - 50;
b <= \"0101\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 40 then
buf_data := buf_data - 40;
b <= \"0100\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 30 then
buf_data := buf_data - 30;
b <= \"0011\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 20 then
buf_data := buf_data - 20;
b <= \"0010\";
c_1 <= buf_data;
mode <= 3;
elsif buf_data >= 10 then
buf_data := buf_data - 10;
b <= \"0001\";
c_1 <= buf_data;
mode <= 3;
else
b <= \"0000\";
c_1 <= buf_data;
mode <= 3;
end if;
elsif mode = 3 then
--o_data_100 <= a;
--o_data_10 <= b;
--o_data_1 <= c;
o_data(15 downto 12) <= a;
o_data(11 downto 8) <= b;
o_data(7 downto 4) <= c;
o_data(3 downto 0) <= \"0000\";
if cnt = 3 then
o_cmplt <= \'0\';
mode <= 0;
cnt := 0;
else
cnt := cnt + 1;
mode <= 3;
o_cmplt <= \'1\';
end if;
else
mode <= 0;
end if;
end if;
end process;
process(clk)
begin
if clk\'event and clk = \'1\' then
case c_1 is
when 0 =>
c <= \"0000\";
when 1 =>
c <= \"0001\";
when 2 =>
c <= \"0010\";
when 3 =>
c <= \"0011\";
when 4 =>
c <= \"0100\";
when 5 =>
c <= \"0101\";
when 6 =>
c <= \"0110\";
when 7 =>
c <= \"0111\";
when 8 =>
c <= \"1000\";
when 9 =>
c <= \"1001\";
when others => null;
end case;
end if;
end process;
end arc;

키워드

디지털시계소스,   vhdl소스,   도트매트릭스,   vhdl lcd소스,   stop_watch 소스